IDT74FCT163827APF 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT74FCT163827APF Datasheet PDF : 7 Pages
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IDT74FCT163827A/B/C
FAST CMOS 20-BIT BUFFERS
COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V IN
Pulse
Generator
6V
V CC
V OUT
D.U.T.
500Ω
Open
GND
50pF
500Ω
RT
CL
3083 drw 05
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
6V
Enable Low
Disable High
Enable High
GND
All Other tests
Open
DEFINITIONS:
3083 lnk 08
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU
ETC.
tH
tREM
tH
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
tPHL
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
LOW-HIGH-LOW
3V
PULSE
1.5V
0V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
3V
1.5V
0V
3083 drw 06
1.5V
1.5V
3083 drw 07
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
3083 drw 08
ENABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
6V
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
GND
DISABLE
tPLZ
3V
1.5V
0.3V
tPHZ
1.5V
0V
0.3V
3V
1.5V
0V
3V
VOL
VOH
0V
3083 drw 09
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
3. If VCC is below 3V, input voltage swings should be adjusted not to
exceed VCC.
8.9
6
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