IDT72825LB35BG 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT72825LB35BG

CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1024 x 18

Integrated Device Technology 

IDT72805/72815/72825 CMOS Dual SyncFIFO™

256 x 18-BIT, 512 x 18, and 1024 x 18

t

XI

WXI

COMMERCIAL TEMPERATURE RANGE

WCLK

RXI

t XIS

Figure 17. Write Expansion In Timing

t

XI

3139 drw 17

RCLK

t

XIS

Figure 18. Read Expansion In Timing

3139 drw 18

OPERATING CONFIGURATIONS

SINGLE DEVICE CONFIGURATION

Each of the two FIFOs contained in a single IDT72805LB/

72815LB/72825LB may be operated as a stand-alone device

when the application requirements are for 256/512/1024

words or less. The IDT72805LB/72815LB/72825LB are in a

single Device Configuration when the Write Exansion In

(WXI), Read Expansion In (RXI), and First Load (FL) control

inputs are grounded (Figure 19).

RESET (RS)

WRITE CLOCK (WCLK)

WRITE ENABLE (WEN)

LOAD (LD)

DATA IN (D0 - D17)

FULL FLAG (FF)

PROGRAMMABLE (PAE)

HALF-FULL FLAG (HF)

IDT

72805LB/

72815LB/

72825LB

FIFO A or B

READ CLOCK (RCLK)

READ ENABLE (REN)

OUTPUT ENABLE (OE)

DATA OUT (Q0 - Q17)

EMPTY FLAG (EF)

PROGRAMMABLE (PAF)

FIRST LOAD (FL)

READ EXPANSION IN (RXI)

WRITE EXPANSION IN (WXI)

3139 drw 19

Figure 19. Block Diagram of Single 256 x 18/512 x 18/1024 x 18 Synchronous FIFO

(One of the Two FIFOs contained in the 72805/72815/72825)

5.17

17

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