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IDT72265LA

CMOS SUPERSYNC FIFO 8,192 x 18 16,384 x 18

Integrated Device Technology 

Integrated Device Technology, Inc.

CMOS SUPERSYNC FIFO™

8,192 x 18

16,384 x 18

ADDENDUM

PRELIMINARY

IDT72255LA

IDT72265LA

DIFFERENCES BETWEEN THE IDT72255LA/72265LA AND IDT72255L/72265L

IDT has improved the performance of the IDT72255/72265 SuperSync™ FIFOs. The new versions are designated by the

“LA” mark. The LA part is pin-for-pin compatible with the original “L” version. Some differences exist between the two versions.

The following table details these differences.

Ite m

Pin #3

First Word Latency

(IDT Standard Mode)

First Word Latency

(FWFT Mode)

Retransmit Latency

(IDT Standard Mode)

Retransmit Latency

(FWFT Mode)

ICC1

ICC2

Typical ICC15

NEW PART

OLD PART

Comme nts

72255LA

72265LA

72255L

72265L

DC (Don’t Care) - There

is no restriction on

WCLK and RCLK. See

note 1.

60ns2 + tREF + 1 TRCLK4

FS (Frequency Select)

In the LA part this pin must

be tied to either VCC or GND

and must not toggle after

reset.

tFWL1=10*Tf3 + 2TRCLK4 (ns)

First word latency in the LA

part is a fixed value,

independent of the

frequency of RCLK or

WCLK.

60ns2 + tREF + 2 TRCLK4

tFWL2=10*Tf3 + 3TRCLK4 (ns)

First word latency in the LA

part is a fixed value,

independent of the

frequency of RCLK or WCLK

60ns2 + tREF + 1 TRCLK4

60ns2 + tREF + 2 TRCLK4

tRTF1=14*Tf3 + 3TRCLK4 (ns)

Retransmit latency in the LA

part is a fixed value,

independent of the

frequency of RCLK or WCLK

tRTF2=14*Tf3 + 4TRCLK4 (ns)

Retransmit latency in the LA

part is a fixed value,

independent of the

frequency of RCLK or WCLK

80mA

180mA

Active supply current

20mA

15mA

Standby current

15 + 2.1*fS + 0.02*CL*fS Not Given

(mA)

Typical ICC1 Current

calculation.

NOTES:

1. WCLK and RCLK can vary independently and can be stopped. There is no restriction on operating WCLK and RCLK.

2. This is tSKEW3.

3. Tf is the period of the ‘selected clock’.

4. TRCLK is the cycle period of the read clock.

5. Typical ICC1 is based on VCC = 5V, tA =25°C, fS= WCLK frequency = RCLK frequency (in MHz using TTL levels), data switching at fS/2,

CL = Capacitive Load (in pF).

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE

© 2001 Integrated Device Technology, Inc

APRIL 2001

1

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