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IDT7024 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT7024
IDT
Integrated Device Technology IDT
IDT7024 Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDT7024S/L
High-Speed 4K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range(4)
7024X15
Com'l Only
7024X17
Com'l Only
7024X20
Com'l, Ind
& Military
7024X25
Com'l &
Military
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC
Read Cycle Time
tAA
Address Access Time
tACE
Chip Enable Access Time(3)
tABE
Byte Enable Access Time(3)
15
____
17
____
20
____
25
____
ns
____
15
____
17
____
20
____
25
ns
____
15
____
17
____
20
____
25
ns
____
15
____
17
____
20
____
25
ns
tAOE
Output Enable Access Time
____
10
____
10
____
12
____
13
ns
tOH
Output Hold from Address Change
tLZ
Output Low-Z Time(1,2)
tHZ
Output High-Z Time(1,2)
tPU
Chip Enable to Power Up Time(1,2)
tPD
Chip Disable to Power Down Time(1,2)
tSOP
Semaphore Flag Update Pulse (OE or SEM)
tSAA
Semaphore Address Access(3)
3
____
3
____
3
____
3
____
ns
3
____
3
____
3
____
3
____
ns
____
10
____
10
____
12
____
15
ns
0
____
0
____
0
____
0
____
ns
____
15
____
17
____
20
____
25
ns
10
____
10
____
10
____
10
____
ns
____
15
____
17
____
20
____
25
ns
2740 tbl 12a
7024X35
Com'l &
Military
7024X55
Com'l, Ind
& Military
7024X70
Military Only
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC
Read Cycle Time
35
____
55
____
70
____
ns
tAA
Address Access Time
tACE
Chip Enable Access Time(3)
tABE
Byte Enable Access Time(3)
____
35
____
55
____
70
ns
____
35
____
55
____
70
ns
____
35
____
55
____
70
ns
tAOE
Output Enable Access Time
____
20
____
30
____
35
ns
tOH
Output Hold from Address Change
tLZ
Output Low-Z Time(1,2)
tHZ
Output High-Z Time(1,2)
tPU
Chip Enab le to Power Up Time(1,2)
tPD
Chip Disable to Power Down Time(1,2)
tSOP
Semaphore Flag Update Pulse (OE or SEM)
tSAA
Semaphore Address Access(3)
3
____
3
____
3
____
ns
3
____
3
____
3
____
ns
____
15
____
25
____
30
ns
0
____
0
____
0
____
ns
____
35
____
50
____
50
ns
15
____
15
____
15
____
ns
____
35
____
55
____
70
ns
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE = VIL, UB or LB = VIL, and SEM =VIH. To access semaphore, CE = VIH or UB & LB = VIH, and SEM =VIL.
4. 'X' in part number indicates power rating (S or L).
2740 tbl 12b
6.842

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