IDT7006S25J 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT7006S25J Datasheet PDF : 20 Pages
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IDT7006S/L
HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM
PIN CONFIGURATIONS (CONT'D)(1,2)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
51 50 48 46 44 42 40 38 36
11
A5L A4L A2L A0L BUSYL M/S INTR A1R A3R
53 52 49 47 45 43 41 39 37 35 34
10 A7L A6L A3L A1L INTL GND BUSYR A0R A2R A4R A5R
55 54
09 A9L A8L
32 33
A7R A6R
57 56
08 A11L A10L
30 31
A9R A8R
59 58
07 VCC A12L
61 60
06 N/C A13L
63 62
05 SEML CEL
IDT7006
G68-1
68-PIN PGA
TOP VIEW(3)
28 29
A11R A10R
26 27
GND A12R
24 25
N/C A13R
65 64
W 04 OEL R/ L
22 23
SEMR CER
67 66
03 I/O0L N/C
20 21
W OER R/ R
68 1
3
5
7
9
11 13 15 18 19
02 I/O1L I/O2L I/O4L GND I/O7L GND I/O1R VCC I/O4R I/O7R N/C
2
4
6
8
10 12 14 16 17
01
I/O3L I/O5L I/O6L VCC I/O0R I/O2R I/O3R I/O5R I/O6R
A
B
C
D
E
F
G
H
J
K
L
INDEX
2739 drw 04
NOTES:
1. All VCC pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. This text does not indicate orientation of the actual part-marking.
PIN NAMES
Left Port
CEL
R/WL
OEL
Right Port
CER
R/WR
OER
A0L – A13L
A0R – A13R
I/O0L – I/O7L
SEML
INTL
BUSYL
I/O0R – I/O7R
SEMR
INTR
BUSYR
M/S
VCC
GND
Names
Chip Enable
Read/Write Enable
Output Enable
Address
Data Input/Output
Semaphore Enable
Interrupt Flag
Busy Flag
Master or Slave Select
Power
Ground
2739 tbl 01
6.07
3
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