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IDT54FCT162374AT

FAST CMOS 16-BIT REGISTER (3-STATE)

Integrated Device Technology 

IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET

FAST CMOS 16-BIT REGISTER (3-STATE)

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

FCT16374T/162374T

FCT16374AT/162374AT

Symbol

Parameter

tPLH Propagation Delay

tPHL xCLK to xOx

tPZH Output Enable Time

tPZL

tPHZ Output Disable Time

tPLZ

tSU Set-up Time HIGH

or LOW, xDx to xCLK

tH Hold Time HIGH

or LOW, xDx to xCLK

tW xCLK Pulse Width

HIGH or LOW

tSK(o) Output Skew(3)

Condition(1)

CL = 50pF

RL = 500Ω

Com'l.

Mil.

Com'l.

Mil.

Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit

2.0 10.0 2.0 11.0 2.0 6.5 2.0 7.2 ns

1.5 12.5 1.5 14.0 1.5 6.5 1.5 7.5 ns

1.5 8.0 1.5 8.0 1.5 5.5 1.5 6.5 ns

2.0

—

2.0

—

2.0

—

2.0

— ns

1.5

—

1.5

—

1.5

—

1.5

— ns

7.0

—

7.0

—

5.0

—

6.0

— ns

—

0.5

—

0.5

—

0.5

—

0.5 ns

FCT16374CT/162374CT

FCT16374ET/162374ET

Com'l.

Mil.

Com'l.

Mil.

Symbol

Parameter

tPLH Propagation Delay

tPHL xCLK to xOx

tPZH Output Enable Time

tPZL

tPHZ Output Disable Time

tPLZ

tSU Set-up Time HIGH

or LOW, xDx to xCLK

Condition(1)

CL = 50pF

RL = 500Ω

Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit

2.0 5.2 2.0 6.2 1.5 3.7

—

— ns

1.5 5.5 1.5 6.2 1.5 4.4

—

— ns

1.5 5.0 1.5 5.7 1.5 3.6

—

— ns

2.0

—

2.0

—

1.5

—

—

— ns

tH Hold Time HIGH

or LOW, xDx to xCLK

tW xCLK Pulse Width

HIGH or LOW

tSK(o) Output Skew(3)

1.5

—

1.5

—

0.0

—

—

— ns

5.0

—

6.0

—

3.0(4)

—

—

— ns

—

0.5

—

0.5

—

0.5

—

— ns

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

4. This limit is guaranteed but not tested.

2542 tbl 09

5.8

6

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