ICS9147-09 데이터 시트보기 (PDF) - Integrated Circuit Systems
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ICS9147-09 Datasheet PDF : 9 Pages
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Functionality with (14.31818 MHz input)
Address Select
FS2 FS1 FS0
000
001
010
011
100
101
110
111
CPUL
(1:2)
CPUH
SDRAM
(1:12)
(MHz)
60
66.8
50
55
75
68.5
83.3
Tristate
BUS (1:6)
(MHz)
24M 48M
(MHz) (MHz)
BSEL=1 BSEL=0
30
32
33.4
32
25
32
27.5
32
37.5
32
34.3
32
41.65
32
Tristate Tristate
(MHz)
24
24
24
24
24
24
24
Tristate
(MHz)
48
48
48
48
48
48
48
Tristate
**Test: is the frequency applied to the X1 input. Can be crystal or tester generated clock overriding crystal at X1 pin.
Clock Enable Configuration
PD#
CPUSTOP#
CPUL (1:2)
CPUH
SDRAM
(1:12)
BUS (1:6)
24MHz
48MHz
REF
1
1
Running Running Running Running Running Running
1
0
Stop Low Running Running Running Running Running
0
X
Stop Low Stop Low Stop Low Stop Low Stop Low Stop Low
ICS9147- 09
3
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