Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS810001-21
FEMTOCLOCKS™ DUAL VCXO VIDEO PLL
PARAMETER MEASUREMENT INFORMATION
1.65V±5%
VVDDDDA, , VDDO,
VDDX
LVCMOS
VEE
-1.65V±5%
SCOPE
Qx
Phase Noise Plot
Phase Noise Mask
f1 Offset Frequency f2
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
PHASE JITTER
V
DDO
Q
2
t PW
t
PERIOD
odc = t PW x 100%
t PERIOD
20%
Clock
Outputs
80%
tR
80%
tF
20%
OUTPUT DUTY CYCLE/PULSE WIDTH/tPERIOD
OUTPUT RISE/FALL TIME
810001BK-21
www.icst.com/products/hiperclocks.html
10
REV. A AUGUST 12, 2005