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ICS83905

LOW SKEW, 1:6 CRYSTAL INTERFACE-TO-LVCMOS / LVTTL FANOUT BUFFER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

PRELIMINARY

ICS83905

LOW SKEW, 1:6 CRYSTAL INTERFACE-TO-

LVCMOS / LVTTL FANOUT BUFFER

TABLE 5A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C

Symbol Parameter

Test Conditions Minimum Typical Maximum Units

Using External Crystal

f

Output Frequency

MAX

Using External Clock Source

10

50

MHz

DC

100 MHz

HIGH (above 2V); NOTE 1

0.5T

LOW (below 0.8V), NOTE 2

tPW

Output Pulse Width

HIGH (above 2V); NOTE 1

T = Periods

0.5T

0.5T

LOW (below 0.8V), NOTE 2

0.5T

tPER

tsk(o)

Output Period

Output Skew; NOTE 3, 5

T = desired Period

TBD

10

ps

tR/ tF

Output Rise/Fall Time

tEN

Output Enable Time; ENABLE 1

NOTE 4

ENABLE 2

20% to 80%

500

ps

TBD

ms

TBD

ms

t

DIS

Output Disable Time; ENABLE 1

NOTE 4

ENABLE 2

TBD

ms

TBD

ms

AOSC

XTAL_IN to XTAL_OUT Oscillator Gain

Phase Loop Phase Shift Modulo 360°+

TBD

db

TBD

°

All parameters measured at fMAX unless noted otherwise.

NOTE 1: Assuming input duty cycle specs from Recommended Operating Conditons table are met.

NOTE 2: Assuming external crystal or 50% duty cycle external reference is used.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2.

NOTE 4: These parameters are guaranteed by characterization. Not tested in production.

NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.

TABLE 5B. AC CHARACTERISTICS, VDD = VDDO = 2.5V±5%, TA = 0°C TO 70°C

Symbol Parameter

Test Conditions

Using External Crystal

fMAX

Output Frequency

Using External Clock Source

odc

Output Duty Cycle

tPER

tsk(o)

Output Period

Output Skew; NOTE 3, 5

t /t

Output Rise/Fall Time

RF

tEN

Output Enable Time; ENABLE 1

NOTE 4

ENABLE 2

20% to 80%

tDIS

Output Disable Time; ENABLE 1

NOTE 4

ENABLE 2

AOSC

XTAL_IN to XTAL_OUT Oscillator Gain

Phase Loop Phase Shift Modulo 360°+

See notes from Table 5A.

Minimum Typical Maximum Units

10

50

MHz

DC

100 MHz

50

%

TBD

10

ps

500

ps

TBD

ms

TBD

ms

TBD

ms

TBD

ms

TBD

db

TBD

°

83905AM

http://www.icst.com/products/hiperclocks.html

5

REV. A JANUARY 20, 2005

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