1527G1LF 데이터 시트보기 (PDF) - Integrated Circuit Systems

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1527G1LF

Video Clock Synthesizer

Integrated Circuit Systems 

ICS1527 Data Sheet

Section 4 Programming

4.1 Industry-Standard I2C Serial Bus: Data Format

Section 4 Programming

Figure 4-1 ICS1527 Data Format for I2C 2-Wire Serial Bus

Single/m ultiple register write (page write)

Device address

W ord address

S010011B0A

A

T

C

C

A

K

K

R

T

Data (0)

A ...

C

K

Data (n)

AS

CT

KO

P

Single/m ultiple register read

Device address

S010011B0A

T

C

A

K

R

T

W ord address

Device address

AS0 1 0 0 1 1B1A

CT

C

KA

K

R

T

Data (0)

A ...

C

K

Sequential single/multiple register read

Device address

S010011B1A

T

C

A

K

R

T

Data (0)

A ...

C

K

Data (n)

NS

OT

AO

CP

K

M aster drives line

Slave drives line

Data (n)

NS

OT

AO

CP

K

Notes:

The ICS1527 uses 16 byte pages (00h-0Fh is the first page, 10h-1Fh is the second page). Writing or reading

beyond the end of page yields undefined results.

The ICS1527 has a device address of 010011B, where B is the state of the I2CADR pin.

MDS1527 G

7

Revision 110905

Integrated Circuit Systems, 525 Race Street, San Jose, CA 95126, tel (408) 297-1201 www.icst.com

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