HY27SA(08/16)1G1M 데이터 시트보기 (PDF) - Hynix Semiconductor

부품명

상세내역

일치하는 목록

HY27SA(08/16)1G1M

1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory

Hynix Semiconductor 

HY27UA(08/16)1G1M Series

HY27SA(08/16)1G1M Series

1Gbit (128Mx8bit / 64Mx16bit) NAND Flash

Data Output

Data Output bus operations are used to read: the data in the memory array, the Status Register, the Electronic Signa-

ture and the Serial Number. Data is output when Chip Enable is Low, Write Enable is High, Address Latch Enable is

Low, and Command Latch Enable is Low. The data is output sequentially using the Read Enable signal.

See Figure 24 and Table 15 for details of the timings requirements.

Write Protect

Write Protect bus operations are used to protect the memory against program or erase operations. When the Write

Protect signal is Low the device will not accept program or erase operations and so the contents of the memory array

cannot be altered. The Write Protect signal is not latched by Write Enable to ensure protection even during power-up.

Standby

When Chip Enable is High the memory enters Standby mode, the device is deselected, outputs are disabled and power

consumption is reduced.

Rev 0.5 / Oct. 2004

10

Share Link: