HT56R666 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT56R666 Datasheet PDF : 104 Pages
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HT56R66/HT56R666
Pin Description
The following table depicts the pins common to all devices.
Pin Name
PA0/BZ
PA1/BZ
PA2
PA3/PFD
PA4/TMR2
PA5/TMR3
PA6~PA7
PB0/AN0~
PB7/AN7
PD0/PWM0~
PD3/PWM3
PD4/INT0
PD5/INT1
PD6/TMR0
PD7/TMR1
OSC1
OSC2
OSC3
OSC4
I/O
Configuration
Option
Description
Bidirectional 8-bit input/output port. Each individual bit on this port can be
configured as a wake-up input using the PAWU register. Software instruc-
BZ/BZ
tions determine if the pin is a CMOS output or Schmitt trigger input. A
I/O
pull-high resistor can be connected to each pin using the PAPU register. Pins
PFD
PA0, PA1, PA3, PA4 and PA5 are shared with BZ, BZ, PFD, TMR2 and
TMR3 respectively, the function of which is chosen via configuration option.
Pins PA0~PA3 can also be setup as open drain pins using the MISC register.
Bidirectional 8-bit input/output port. Software instructions determine if the pin
is a CMOS output or Schmitt trigger input. A pull-high resistor can be con-
I/O
¾
nected to each pin using the PBPU register. PB is pin-shared with the A/D in-
put pins. The A/D inputs are selected via software instructions. Once selected
as an A/D input, the I/O function and pull-high resistor selections are disabled
automatically.
Bidirectional 8-bit input/output port. Software instructions determine if the pin
is a CMOS output or Schmitt trigger input. A pull-high resistor can be con-
I/O
¾
nected to each pin using the PDPU register. The PWM outputs,
PWM0~PWM3, are pin shared with pins PD0~PD3, the function of which is
chosen using the PWM registers. Pins PD4~PD7 are pin-shared with INT0,
INT1, TMR0 and TMR1 respectively.
OSC1, OSC2 are connected to an external RC network or external crystal,
I
O
Crystal or
RC or EC
determined by configuration option, for the internal system clock. If the RC
system clock option is selected, pin OSC2 can be used to measure the sys-
tem clock at 1/4 frequency. EC is external clock mode, we can connect exter-
nal clock to OSC1 directly.
I
O
32768Hz
OSC3 and OSC4 are connected to a 32768Hz crystal oscillator to form a real
time clock for fSUB or fSL. This 32768Hz crystal is disabled/enabled by configu-
ration option.
VREF
I
¾
A/D reference voltage input pin
RES
I
¾
Schmitt Trigger reset input. Active low
VDD
¾
¾
Positive power supply
VSS
AVDD
AVSS
¾
¾
Negative power supply, ground
¾
¾
Analog positive power supply
¾
¾
Analog negative power supply, ground
Rev. 1.40
4
May 11, 2012
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