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HSP50214VC

Programmable Downconverter

Intersil 

HSP50214

Functional Description

The HSP50214 Programmable Downconverter (PDC) is an

agile digital tuner designed to meet the requirements of a

wide variety of communications industry standards. The

PDC contains the processing functions needed to convert

sampled IF signals to baseband digital samples. These func-

tions include LO generation/mixing, decimation filtering, pro-

grammable FIR shaping/bandlimiting filtering, re-sampling,

automatic gain control (AGC), frequency discrimination and

detection as well as multi-chip synchronization. The

HSP50214 interfaces directly with a DSP microprocessor to

pass baseband and status data.

A top level functional block diagram of the HSP50214 is

shown in Figure 1. The diagram shows the major blocks and

multiplexers used to reconfigure the data path for various

architectures. The HSP50214 can be broken into 13 sec-

tions: Synchronization, Input, Input Level Detector, Carrier

Mixer/Numerically Control Oscillator (NCO), CIC Decimating

Filter, Halfband Decimating Filter, 255-Tap Programmable

FIR Filter, Automatic Gain Control (AGC), Resampler/Half-

band Filter, Timing NCO, Cartesian to Polar Converter, Dis-

criminator, and Output sections. All of these sections are

configured through a microprocessor interface.

The HSP50214 has three clock inputs; two are required and

one is optional. The input level detector, carrier NCO, and CIC

decimating filter sections operate on the rising edge of the

input clock, CLKIN. The halfband filter, programmable FIR fil-

ter, AGC, Resampler/Halfband filters, timing NCO, discrimina-

tor, and output sections operate on the rising edge of

PROCCLK. The third clock, REFCLK, is used to generate tim-

ing error information.

NOTE: All of the clocks may be asynchronous.

PDC Applications Overview

This section highlights the motivation behind the key program-

mable features from a communications system level perspec-

tive. These motivations will be defined in terms of ability to

provide DSP processing capability for specific modulation for-

mats and communication applications. The versatility of the

Programmable Downconverter can be intimidating because of

the many Control Words required for chip configuration. This

section provides system level insight to help allay reservations

about this versatile DSP product. It should help the designer

capitalize on the greatest feature of the PDC - VERSATILITY

THROUGH PROGRAMMABILITY. It is this feature, when fully

understood, that brings the greatest return on design invest-

ment by offering a single receiver design that can process the

many waveforms required in the communications marketplace.

FDM Based Standards and Applications

Table 1 provides an overview of some common frequency

division multiplex (FDM) base station applications to which the

PDC can be applied. The PDC provides excellent selectivity

for frequency division multiple access (FDMA) signals. This

high selectivity is achieved with 0.012Hz resolution frequency

control of the NCO and the sharp filter responses capable

with a 255-tap, 22-bit coefficient FIR filter. The 16-bit resolu-

tion out of the Cartesian to Polar Coordinate converter are

routed to the frequency detector, which is followed by a 63-

tap, 22-bit coefficient FIR filter structure for facilitating FM and

FSK detection. The 14-bit input resolution is the smallest bit

resolution found throughout the conversion and filtering sec-

tions, providing excellent dynamic range in the DSP process-

ing. A unique input gain scaler adds an additional 42dB of

range to the input level variation, to compensate for changes

in the analog RF front end receive equipment. Synchroniza-

tion circuitry allows precise timing control of the base station

reconfiguration for all receive channels simultaneously. Por-

tions of this table were corroborated with reference [2].

TABLE 1. CELLULAR PHONE BASE STATION APPLICATIONS

USING FDMA

AMPS MCS-L1 NMT-400

ETACS

STANDARD (IS-91) MCS-L2 NMT-900 C450 NTACS

RX BAND 824-849 925-940 453-458 451-456 871-904

(MHz)

890-915

915-925

CHANNEL 30

25.0

25

20.0

25.0

BW (kHz)

12.5

12.5

10.0

12.5

# TRAFFIC 832

600

200

222

1240

CHANNELS

1200

1999

444

800

VOICE FM

FM

MODULA-

TION

FM

FM

FM

PEAK 12

5

DEVIATION

(kHz)

5

4

9.5

CONTROL FSK

FSK

MODULA-

TION

FSK

FSK

FSK

PEAK 8

DEVIATION

(kHz)

4.5

3.5

2.5

6.4

CONTROL 10

0.3

1.2

5.3

8

CHANNEL

RATE

(Kbps)

TDM Based Standards and Applications

Table 2 provides an overview of some common time division

multiplying (TDM) base station applications to which the

PDC can be applied. For time division multiple access

(TDMA) applications, such as North American TDMA

(IS136), where 30kHz is the received band of interest the

PCS basestation, the PDC offers 0.012Hz frequency resolu-

tion in downconversion in addition to α = 0.35 matched (pro-

grammable) filtering capability. The π/4 DPSK modulation

can be processed using the PDC Cartesian to Polar coordi-

nate converter and dφ/dt detector circuitry or by processing

the I/Q samples in the DSP µP. The PDC provides the ability

to change the received signal gain and frequency, synchro-

nous with burst timing. The synchronous gain adjustment

allows the user to measure the power of the signal at the A/D

at the end of a burst, and synchronously reload that same

gain value at the arrival of the next user burst.

For applications other than cellular phones (where the pre-

ambles are not changed), the PDC frequency discriminator

output can be used to obtain correlation on the preamble

pattern to aid in burst acquisition.

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