HM5165165FLTT-5 데이터 시트보기 (PDF) - Elpida Memory, Inc

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HM5165165FLTT-5

64M EDO DRAM (4-Mword × 16-bit) 8k refresh/4k refresh

Elpida Memory, Inc 

HM5164165F Series, HM5165165F Series

DC Characteristics (HM5165165F Series)

EParameter

Operating current*1, *2

Standby current

HM5165165F

-5

Symbol Min Max

I CC1

— 140

I CC2

—2

OL — 0.5

-6

Min

—

—

—

Max

120

2

0.5

Unit Test conditions

mA tRC = min

mA TTL interface

RAS, UCAS, LCAS = VIH

Dout = High-Z

mA CMOS interface

RAS, UCAS,

LCAS ≥ VCC – 0.2 V

Dout = High-Z

Standby current

(L-version)

I CC2

—

300 —

300 µA CMOS interface

RAS, UCAS,

LCAS ≥ VCC – 0.2 V

Dout = High-Z

RAS-only refresh current*2

I CC3

P Standby current*1

I CC5

—

140 —

120 mA tRC = min

—5

—

5

mA RAS = VIH

UCAS, LCAS = VIL

Dout = enable

CAS-before-RAS refresh

r current

I CC6

—

140 —

120 mA tRC = min

o EDO page mode current*1, *3 ICC7

—

120 —

110 mA RAS = VIL , CAS cycle,

tHPC = tHPC min

Battery backup current*4

I CC10

—

1.2 —

1.2 mA CMOS interface

(Standby with CBR refresh)

Dout = High-Z

d (L-version)

CBR refresh: tRC = 15.6 µs

tRAS ≤ 0.3 µs

Self refresh mode current

(L-version)

I CC11

—

500 —

500 µA CMOS interface

RAS, UCAS, LCAS ≤ 0.2 V

Dout = High-Z

u Input leakage current

Output leakage current

I LI

–5 5

–5

5

µA 0 V ≤ Vin ≤ VCC + 0.3 V

I LO

–5 5

–5

5

µA 0 V ≤ Vout ≤ VCC

Dout = disable

c Output high voltage

VOH

2.4

VCC

2.4

VCC

V

High Iout = –2 mA

Output low voltage

VOL

0

0.4 0

0.4 V Low Iout = 2 mA

t Notes: 1. ICC depends on output load condition when the device is selected. ICC max is specified at the output

open condition.

2. Address can be changed once or less while RAS = VIL.

3. Measured with one sequential address change per EDO cycle, tHPC.

4. VIH ≥ VCC – 0.2 V, 0 V ≤ VIL ≤ 0.2 V.

Data Sheet E0099H10

10

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