4042B 데이터 시트보기 (PDF) - Philips Electronics
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4042B Datasheet PDF : 6 Pages
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Philips Semiconductors
Quadruple D-latch
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL MIN. TYP. MAX.
Propagation delays
D → O, O
HIGH to LOW
LOW to HIGH
E → O, O
HIGH to LOW
LOW to HIGH
Output transition
times
HIGH to LOW
LOW to HIGH
Set-up time
D→E
Hold time
D→E
Minimum enable
pulse width
5
10 tPHL
15
5
10 tPLH
15
5
10 tPHL
15
5
10 tPLH
15
5
10 tTHL
15
5
10 tTLH
15
5
10 tsu
15
5
10 thold
15
5
10 tWE
15
95 190 ns
40 80 ns
30 55 ns
85 175 ns
40 75 ns
30 60 ns
130 260 ns
50 105 ns
35 75 ns
120 245 ns
50 105 ns
35 75 ns
60 120 ns
30 60 ns
20 40 ns
60 120 ns
30 60 ns
20 40 ns
30 10
ns
20 5
ns
20 5
ns
15 −5
ns
15 0
ns
15 0
ns
90 45
ns
40 20
ns
30 15
ns
Product specification
HEF4042B
MSI
TYPICAL EXTRAPOLATION
FORMULA
67 ns + (0,55 ns/pF) CL
28 ns + (0,23 ns/pF) CL
22 ns + (0,16 ns/pF) CL
57 ns + (0,55 ns/pF) CL
28 ns + (0,23 ns/pF) CL
22 ns + (0,16 ns/pF) CL
102 ns + (0,55 ns/pF) CL
38 ns + (0,23 ns/pF) CL
27 ns + (0,16 ns/pF) CL
92 ns + (0,55 ns/pF) CL
38 ns + (0,23 ns/pF) CL
27 ns + (0,16 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
see also waveforms
Figs 5 and 6
Dynamic power
dissipation per
package (P)
January 1995
VDD
V
TYPICAL FORMULA FOR P (W)
5
3800 fi + ∑ (foCL) × VDD2
10 15 700 fi + ∑ (foCL) × VDD2
15 41 100 fi + ∑ (foCL) × VDD2
4
where
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
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