HD74LS73ARPEL 데이터 시트보기 (PDF) - Renesas Electronics

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HD74LS73ARPEL

Dual J-K Flip-Flops(with Preset/ Common Clear/ and Common Clock)

Renesas Electronics 

HD74LS73A

Block Diagram (1/2)

Q

Q

Clear

K

J

Clock

Absolute Maximum Ratings

Item

Symbol

Ratings

Supply voltage

VCC

7

Input voltage

VIN

7

Power dissipation

PT

400

Storage temperature

Tstg

–65 to +150

Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.

Recommended Operating Conditions

Item

Symbol

Supply voltage

VCC

Output current

IOH

IOL

Operating temperature

Topr

Clock frequency

fclock

Pulse width

tw (Clock High)

tw (Clear Low)

Setup time

tsu (“H” Data)

tsu (“L” Data)

Hold time

th

Note: ↓; The arrow indicates the falling edge.

Min

4.75

—

—

–20

0

20

25

20↓

20↓

0↓

Typ

5.00

—

—

25

—

—

—

—

—

—

Max

5.25

–400

8

75

30

—

—

—

—

—

Unit

V

V

mW

°C

Unit

V

µA

mA

°C

MHz

ns

ns

ns

Rev.3.00, Jul.22.2005, page 2 of 6

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