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HD74LS245RPEL 데이터 시트보기 (PDF) - Renesas Electronics

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HD74LS245RPEL
Renesas
Renesas Electronics Renesas
HD74LS245RPEL Datasheet PDF : 6 Pages
1 2 3 4 5 6
HD74LS245
Octal Bus Transceivers (with three-state outputs)
REJ03D0464–0300
Rev.3.00
Jul.15.2005
This octal bus transceiver is designed for synchronous two-way communication between data buses. The control
function implementation minimizes external timing requirements. The device allows data transmission from the A bus
to the B bus or from the B bus to the A bus depending upon the logic level at the direction control (DIR) input. The
enable input (G) can be used to disable the device so that the buses are effectively isolated.
Features
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS245P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
PRSP0020DD-B
HD74LS245FPEL SOP-20 pin (JEITA)
(FP-20DAV)
FP
HD74LS245RPEL SOP-20 pin (JEDEC) PRSP0020DC-A
RP
(FP-20DBV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
Pin Arrangement
DIR 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
GND 10
20 VCC
19 Enable G
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
(Top view)
Rev.3.00, Jul.15.2005, page 1 of 5

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