HD74HCT138FPEL 데이터 시트보기 (PDF) - Renesas Electronics

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HD74HCT138FPEL

3-to-8-line Decoder/Demultiplexer

Renesas Electronics 

HD74HCT138

Pin Arrangement

A1

Select

Inputs

B2

C3

G2A 4

Enable

Inputs

G2B 5

G1 6

Outputs Y7 7

GND 8

A

B

Y0

C

Y1

G2A

Y2

G2B

Y3

G1

Y4

Y7 Y6 Y5

(Top view)

16 VCC

15 Y0

14 Y1

13 Y2

12 Y3 Outputs

11 Y4

10 Y5

9 Y6

Logic Diagram

G1

G2A

G2B

Y0

Y1

A

Y2

B

Y3

Y4

C

Y5

Y6

Y7

Rev.2.00 Mar 30, 2006 page 2 of 5

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