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HD74HC283RPEL 데이터 시트보기 (PDF) - Renesas Electronics

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HD74HC283RPEL
Renesas
Renesas Electronics Renesas
HD74HC283RPEL Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
HD74HC283
4-bit Binary Full Adder
REJ03D0607–0200
(Previous ADE-205-485)
Rev.2.00
Jan 31, 2006
Description
The sun (Σ) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. This adder
features full internal look ahead across all four bits. This provides the system designer with partial look-ahead
performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including
the carry, is implemented in its true for meaning that the end-around carry can be accomplished without the need for
logic or level inversion.
Features
High Speed Operation: tpd = 19 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC283P
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
HD74HC283FPEL SOP-16 pin (JEITA)
PRSP0016DH-B FP
(FP-16DAV)
HD74HC283RPEL SOP-16 pin (JEDEC)
PRSP0016DG-A
(FP-16DNV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Rev.2.00 Jan 31, 2006 page 1 of 7

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