GTL2008 데이터 시트보기 (PDF) - Philips Electronics

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GTL2008

12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs

Philips Electronics 

Philips Semiconductors

GTL2008; GTL2107

GTL translator with power good control and high-impedance outputs

5. Functional diagram

GTL VREF

1AO

LVTTL outputs

(open-drain)

2AO

5A

LVTTL inputs/outputs

(open-drain)

6A

LVTTL input EN1

GTL input 11BI

GTL2008/GTL2107

1

2

3

4

5

6

7

LVTTL input/output

(open-drain)

11A

8

GTL input 9BI

9

3AO

10

LVTTL outputs

(open-drain)

4AO

11

27

1BI

GTL inputs

26

2BI

&

25

&

24

23

(2)

1

22

DELAY(1)

21

DELAY(1)

20

19

7BO1

7BO2

GTL outputs

EN2 LVTTL input

11BO GTL output

5BI

6BI

GTL inputs

3BI

18

4BI

10AI1

12

LVTTL inputs

10AI2

13

1

17

10BO1

1

GTL outputs

16

10BO2

15

9AO LVTTL output

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(1) The enable on 7BO1/7BO2 include a delay that prevents the transient condition where 5BI/6BI go from LOW to HIGH, and

the LOW to HIGH on 5A/6A lags up to 100 ns from causing a LOW glitch on the 7BO1/7BO2 outputs.

(2) The 11BO output is driven LOW after VCC is powered up with EN2 LOW to prevent reporting of a fault condition before EN2

goes HIGH.

Fig 1. Logic diagram of GTL2008/GTL2107

GTL2008_GTL2107_2

Product data sheet

Rev. 02 — 26 September 2006

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.

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