GS9023A 데이터 시트보기 (PDF) - Gennum -> Semtech
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GS9023A Datasheet PDF : 37 Pages
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RATE: Sampling frequency. The GS9023A operates at a
fixed sampling frequency of 48kHz. The audio control
packet RATE word structure is shown in Table 7.
TABLE 7 AUDIO CONTROL PACKET RATE WORD STRUCTURE
BIT
RATE WORD
b9
not b8
b8
not used (fixed to 0)
b7
y2 (MSB, fixed to 0)
b6
y1 (fixed to 0)
b5
y0 (LSB, fixed to 0)
b4
bsync
b3
x2 (MSB, fixed to 0)
b2
x1 (fixed to 0)
b1
x0 (LSB, fixed to 0)
b0
async
The audio control packet RATE word bits are defined as
follows:
a(4-1): Individual active channel status indicator. The bits
correspond directly to the “CHACT(4-1)” bits of Host
Interface Register #1h. The bits are set HIGH for each
active channel in a given audio group. The correlation of the
active channels for the four active audio groups is shown in
Table 9.
TABLE 9 AUDIO CONTROL PACKET ACTIVE CHANNEL CON-
FIGURATION
GROUP1 GROUP2 GROUP3 GROUP4
CHACT 1 Channel 1 Channel 5 Channel 9 Channel 13
CHACT 2 Channel 2 Channel 6 Channel 10 Channel 14
CHACT 3 Channel 3 Channel 7 Channel 11 Channel 15
CHACT 4 Channel 4 Channel 8 Channel 12 Channel 16
DELx(0-2): Indicates the amount of accumulated audio
processing delay relative to video, measured in audio
sample intervals for each of the channels. Positive values
indicate that the video leads the audio. The audio control
packets delay word structure is shown in Table 10.
x[2:0], y[2:0]: Audio sampling rate for subframe 1 and 2
respectively. Fixed at 48kHz.
async, bsync: Set LOW when each audio channel pair is
operating synchronously and set HIGH when operating
asynchronously. Forced LOW due to synchronous
operation.
ACT: The ACT word indicates the active group channels.
The audio control packet ACT word structure is shown in
Table 8.
TABLE 8 AUDIO CONTROL PACKET ACT WORD STRUCTURE
BIT
ACT WORD
b9
not b8
b8
p
b7
reserved (set to 0)
b6
reserved (set to 0)
b5
reserved (set to 0)
b4
reserved (set to 0)
b3
a4
b2
a3
b1
a2
b0
a1
The audio control packet ACT word bits are defined as
follows:
p: Even parity for bits b0 to b7.
TABLE 10 AUDIO CONTROL PACKET DELAY STRUCTURE
BIT
DELX0
DELX1
DELX2
b9
not b8
not b8
not b8
b8
dela/b 7
dela/b 16
dela/b 25 (Sign)
b7
dela/b 6
dela/b 15
dela/b 24 (MSB)
b6
dela/b 5
dela/b 14
dela/b 23
b5
dela/b 4
dela/b 13
dela/b 22
b4
dela/b 3
dela/b 12
dela/b 21
b3
dela/b 2
dela/b 11
dela/b 20
b2
dela/b 1
dela/b 10
dela/b 19
b1
dela/b 0
(LSB)
dela/b 9
dela/b 18
b0
e
dela/b 8
dela/b 17
The audio control packet delay word bits are defined as
follows:
e: Indicates valid audio delay data when set HIGH.
Corresponds to the “ACDLY” bit of Host Interface Register
#Dh.
dela/b[25:0]: The audio channel pair delay is programmed
in bits “DELA/B[25:0]” of Host Interface Register #Ah, #Bh,
#Ch and #Dh. DELA[25:0] corresponds to the delay for
channels 1 and 2. “DELB[25:0]” corresponds to the delay
for channels 3 and 4.
RSRV: Reserved. The word is fixed at 200h and is
automatically generated by the GS9023A.
CS: Checksum. The checksum consists of nine bits. The
checksum is used to determine the validity of the words
data ID through user data. It is the sum of the nine least
significant bits of the words data ID through user data. The
checksum is automatically generated by the GS9023A.
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