GS71108AGJ-10 데이터 시트보기 (PDF) - Unspecified

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GS71108AGJ-10

128K x 8 1Mb Asynchronous SRAM

Unspecified 

Address

Data Out

Read Cycle 1: CE = OE = VIL, WE = VIH

tRC

GS71108ATP/J/SJ/U

tAA

tOH

Previous Data

Data valid

Address

CE

OE

Data Out

Read Cycle 2: WE = VIH

tRC

tAA

tAC

tHZ

tLZ

tOE

tOLZ

High impedance

tOHZ

DATA VALID

Rev: 1.08 6/2006

6/16

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2001, GSI Technology

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