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GS1582 Datasheet PDF : 115 Pages
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Table 1-1: Pin Descriptions (Continued)
Pin
Number
A3
A4
A5, E1, G10,
K8
A6, B6
A7
A8
A9
A10
Name
F/DE
H/HSYNC
CORE_VDD
PD_VDD
LF
VCO_VCC
VCO
CP_VDD
Timing
Type Description
Synchronous
with PCLK
Synchronous
with PCLK
Non
Synchronous
Analog
Analog
Analog
Analog
Analog
Input
PARALLEL DATA TIMING
Signal levels are LVCMOS/LVTTL compatible.
TIM_861 = LOW:
Used to indicate the ODD / EVEN field of the video signal when
DETECT_TRS is set LOW. The device will set the F bit in all outgoing
TRS signals for the entire period that the F input signal is HIGH
(IOPROC_EN/DIS must also be HIGH).
The F signal should be set HIGH for the entire period of field 2 and
should be set LOW for all lines in field 1 and for all lines in
progressive scan systems.
The F signal is ignored when DETECT_TRS = HIGH.
TIM_861 = HIGH:
The DE signal is used to indicate the active video period. DE is HIGH
for active data and LOW for blanking. See Section 4.3.1 and
Section 4.3.2 for timing details.
The DE signal is ignored when DETECT_TRS = HIGH.
Input
PARALLEL DATA TIMING
Signal levels are LVCMOS/LVTTL compatible.
TIM_861 = LOW:
The H signal is used to indicate the portion of the video line
containing active video data, when DETECT_TRS is set low.
Active Line Blanking
The H signal should be set HIGH for the entire horizontal blanking
period, including the EAV and SAV TRS words, and LOW otherwise.
This is the default setting.
TRS Based Blanking (H_CONFIG = 1h)
The H signal should be set HIGH for the entire horizontal blanking
period as indicated by the H bit in the received TRS ID words, and
LOW otherwise.
The H signal is ignored when DETECT_TRS = HIGH.
TIM_861 = HIGH:
The HSYNC signal indicates horizontal timing. See Section 4.3.1 for
timing details.
The HSYNC signal is ignored when DETECT_TRS = HIGH.
Input Power supply connection for the digital core logic. Connect to +1.8V
Power DC digital.
Input Power supply connection for the phase detector. Connect to +1.8V
Power DC analog.
Input PLL loop filter connection.
Output Power supply for the external voltage controlled oscillator.
Power 2.5V DC supplied by the device to the external VCO.
Input Input from external VCO.
Input Power supply connection for the charge pump and on chip VCO
Power regulator. Connect to +3.3V DC analog.
GS1582 Multi-Rate Serializer with Cable Driver, Audio
Multiplexer and ClockCleanerTM
Data Sheet
40117 - 4
December 2011
11 of 115
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