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GS1503BCVE2
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GS1503BCVE2 Datasheet PDF : 90 Pages
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5.9.1 Arbitrary Data Demultiplexing in External Pin Mode
This is the default mode for demultiplexing arbitrary data packets. The GS1503B will set
the PKTEN external pin HIGH before arbitrary data will be output. Two VCLK cycles
after PKTEN goes HIGH, arbitrary data is output on the PKT[7:0] bus. See Figure 5-12 for
timing.
The following arbitrary data is output on the PKT[7:0] bus: Data ID (DID), Secondary Data
ID (SDID), Data Count (DC) and User Data Words (UDW: up to a maximum of 255 words).
Y/Cb/ Cr [19:0]
GS1503B
VIN[19:0]
VCLK
PKTEN
PKT[7:0]
Arbitrary
Packet
2 CLKs
PKTEN
PKT[7:0]
Arbitrary Data Output Enable
Arbitrary Data
2 CLKs
Arbitrary Data
Figure 5-12: Arbitrary Data Packet Output Timing Diagram
5.9.2 Arbitrary Data Demultiplexing in Host Interface Mode
To select this mode, set ARBITMODE bit 0 in Host Interface register 050h HIGH. In this
mode, the DID, SDID, DC and User Data Words must be programmed in the
corresponding Host Interface registers. Set the video line number for field 1 and field 2
from which the arbitrary data packets are to be demultiplexed using the
ARBITLINEA[11:0] and ARBITLINEB[11:0] Host Interface registers respectively. The
arbitrary data packet is demultiplexed when the ARBITON bit 1 in Host Interface
register 050h is set HIGH. ARBITON should be set LOW when reading the arbitrary data
packet User Data Words from the ARBITUDW Host Interface registers.
GS1503B HD Embedded Audio CODEC
Data Sheet
37953 - 1
December 2009
71 of 90

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