Mode B Write Cycle (CPU_SEL set LOW)
PARAMETER
NUMBER
MIN
Write Address Cycle Time
1
80
Write Cycle Time
2
80
Write Enable Setup Time
3
20
Write Address Setup Time
4
20
Write Chip Select Setup Time
5
10
Write Chip Select Hold Time
6
0
Write Data Setup Time
7
30
Write Data Hold Time
8
0
TYP
MAX
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
CPUADR[1:0]
CPUDAT[7:0]
CPUCS
1
1
01
00
Upper Address
Lower Address
2
10
8
Write
Data
7
CPUWE
5
4
6
3
5
4
6
3
5
6
3
Fig. 8 Host Interface Mode B Write Cycle Timing (CPU_SEL set LOW)
Table 1: Host Interface Mode B Control Codes
CPUADR[1:0]
Data Bus Operation
01
Upper Address
00
Lower Address
11
Read Data
10
Write Data
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