GJ1085 데이터 시트보기 (PDF) - GTM CORPORATION
부품명
상세내역
일치하는 목록
GJ1085 Datasheet PDF : 4 Pages
| |||
ISSUED DATE :2005/06/01
REVISED DATE :2006/06/01C
Functional Description
Introduction
The GJ1085 adjustable or fixed-mode Low Dropout (LDO) regulator is a 3 terminal device which can easily be programmed
by internal mask change to any voltage within the range of 1.25 to Vin-1.4V. The GJ1085 only needs 1.4V differential
between Vin and Vout to maintain output regulation, in addition, the output voltage tolerances are also extremely tight and
they include the transient response as port of the specification. For example, Intel VRE specification calls for a total of
̈́100mV including initial tolerance, load regulation and 0 to 3A load step. The GJ1085 is specifically designed to meet the
fast current transient needs as well as providing an accurate initial voltage, reducing the overall system cost with the need
for fewer output capacitors.
Load Regulation
Since the GJ1085 is only a 3 terminal device, it is not possible to provide true remote sensing of the output voltage at the
load. But it can supply good load regulation by internal feedback bypass the external loss such as adjustable mode.
Stability
The GJ1085 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator
stable .For most applications a minimum of 10uF aluminum electrolytic capacitor insures both stability and good transient
response.
Thermal Design
The GJ1085 incorporates an internal shutdown that protects the device when the junction temperature exceeds the
maximum allowable junction temperatures. Although this device can operate with junction temperatures in the range of
150к, it is recommended that the selected heat sink be chosen such that during maximum continuous load operation the
junction temperature is kept below the temperature.
Layout Consideration
The output capacitors must be located as close to the Vout terminal of the device as possible .It is recommended to use a
section of a layer of the PC board as a plane to connect the Vout pin to the output capacitors to prevent any high frequency
oscillation that may result due to excessive trace inductance.
GJ1085
Page: 3/4
Share Link: 