FPF1013 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FPF1013

IntelliMAX™ 1 V-Rated Advanced Load Management Products

Fairchild Semiconductor 

Physical Dimensions

0.03 C

2X

E

A

F

B

BALL A1

INDEX AREA

D

TOP VIEW

0.03 C

2X

0.05 C

0.06 C

0.625

0.539

E

(Ø0.350)

SOLDER MASK A1

OPENING

(Ø0.250)

Cu Pad

(1.00)

(0.50)

RECOMMENDED LAND PATTERN

(NSMD PAD TYPE)

0.332±0.018

0.250±0.025

C

SEATING PLANE D

SIDE VIEWS

0.50

0.005 C A B

Ø0.315 +/- .025

6X

1.00

0.50

12

C

B (Y) ±0.018

A

F

(X) ±0.018

BOTTOM VIEW

NOTES:

A. NO JEDEC REGISTRATION APPLIES.

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS AND TOLERANCE

PER ASMEY14.5M, 1994.

D. DATUM C IS DEFINED BY THE SPHERICAL

CROWNS OF THE BALLS.

E. PACKAGE NOMINAL HEIGHT IS 582 MICRONS

±43 MICRONS (539-625 MICRONS).

F. FOR DIMENSIONS D, E, X, AND Y SEE

PRODUCT DATASHEET.

G. DRAWING FILNAME: MKT-UC006AFrev2.

Figure 24. 6- Ball Wafer-Level Chip-Scale Package (WLCSP) 2X3 ARRAY, 0.5 mm Pitch, 300 µm Ball

E

950 µm ±30 µm

D

1450 µm ±30 µm

X

225 µm

Y

225 µm

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the

warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

© 2009 Fairchild Semiconductor Corporation

FPF1013 / FPF1014 • Rev. 1.0.9

10

www.fairchildsemi.com

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