MC14580B 데이터 시트보기 (PDF) - Motorola => Freescale
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MC14580B Datasheet PDF : 7 Pages
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ÎÎÎÎSÎÎÎÎWIÎÎÎÎTCHÎÎÎÎINGÎÎÎÎCHÎÎÎÎARCÎÎÎÎAhaCrÎÎÎÎaTcEteRÎÎÎÎrIiSstTiÎÎÎÎcICSÎÎÎÎ* (CÎÎÎÎL=5ÎÎÎÎ0pFÎÎÎÎ,TAÎÎÎÎ=2ÎÎÎÎ5_SCyÎÎÎÎ)mbÎÎÎÎol ÎÎÎÎÎÎÎÎVÎÎÎÎDDÎÎÎÎÎÎÎÎÎÎÎÎMinÎÎÎÎÎÎÎÎTÎÎÎÎypÎÎÎÎ# ÎÎÎÎÎÎÎÎMaxÎÎÎÎÎÎÎÎUÎÎÎÎnitÎÎÎÎ
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
Propagation Delay Time
Clock to Output
tTLH, tTHL
ns
5.0
—
100
200
(Figures 3 and 6)
10
—
50
100
15
—
40
80
tPLH, tPHL
5.0
—
650
1300
ns
(Figures 3 and 6)
10
—
250
500
15
—
170
340
Write Enable Setup Time
(Enabling a Write or Read)
tsu
(Figure 5)
5.0
800
400
10
300
150
15
200
100
—
ns
—
—
Write Enable Removal Time
(Disabling a Write or Read)
trem
5.0
(Figure 5)
10
15
0
– 100
—
ns
0
– 50
—
0
– 35
—
Setup Time**
Address, Data to Clock
tsu
5.0
50
20
—
ns
(Figure 3)
10
30
0
—
15
25
0
—
Hold Time**
Clock to Address, Data
th
(Figure 3)
5.0
480
160
10
195
65
15
150
50
—
ns
—
—
3–State Enable/Disable Delay Time
tPHZ, tPLZ
5.0
—
130
260
ns
tPZH, tPZL
10
—
60
120
(Figures 4 and 7)
15
—
45
90
Clock Pulse Width
tw
(Figure 3)
5.0
820
410
10
330
165
15
220
110
—
ns
—
—
** When loading repetitive highs, the output may glitch low momentarily after the rising edge of Clock. However, data integrity remains unaffected
and data is valid after the propagation delays listed in the Switching Characteristics Table.
PULSE
GENERATOR
VDD 1
VSS
2
S1
VDD
WE Q0A
W0
W1 Q1A
R0A Q2A
R1A
R0B Q3A
R1B
C
Q0B
D0 Q1B
D1
D2
Q2B
D3 Q3B
VSS
Vout
IDS
EXTERNAL
POWER
SUPPLY
Position of S1
VGS =
VDS =
Sink Current
2
VDD
Vout
Source Current
1
– VDD
Vout – VDD
Figure 1. Output Drive Current Test Circuit
MOTOROLA CMOS LOGIC DATA
MC14580B
3
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