EP9315 데이터 시트보기 (PDF) - Cirrus Logic

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EP9315

Enhanced Universal Platform System-on-Chip Processor

Cirrus Logic 

EP9315

Enhanced Universal Platform SOC Processor

List of Tables

Table A. Change History .......................................................................................................... 2

Table B. General Purpose Memory Interface Pin Assignments .............................................. 6

Table C. IDE Interface Pin Assignments .................................................................................. 7

Table D. Ethernet Media Access Controller Pin Assignments ................................................. 7

Table E. Audio Interfaces Pin Assignment .............................................................................. 7

Table F. LCD Interface Pin Assignments ................................................................................ 8

Table G. Touch Screen Interface with 12-bit Analog-to-Digital Converter Pin Assignments ... 8

Table H. 64-Key Keypad Interface Pin Assignments ............................................................... 8

Table I. Universal Asynchronous Receiver/Transmitters Pin Assignments ............................ 9

Table J. Triple Port USB Host Pin Assignments ..................................................................... 9

Table K. Two-Wire Port with EEPROM Support Pin Assignments .......................................... 9

Table L. Real-Time Clock with Pin Assignments ................................................................... 10

Table M.PLL and Clocking Pin Assignments ........................................................................ 10

Table N. External Interrupt Pin Assignment ........................................................................... 10

Table O. Dual LED Pin Assignments ..................................................................................... 10

Table P. General Purpose Input/Output Pin Assignment ...................................................... 11

Table Q. Reset and Power Management Pin Assignments ................................................... 11

Table R. Hardware Debug Interface ...................................................................................... 11

Table S. PCMCIA Interface ................................................................................................... 11

Table R. 352 Pin Diagram Dimensions .................................................................................. 56

Table S. Pin Descriptions ..................................................................................................... 60

Table T. Pin Multiplex Usage Information ............................................................................. 62

DS638PP4

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