EN25S16 데이터 시트보기 (PDF) - Eon Silicon Solution Inc.

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EN25S16

16 Megabit 1.8V Serial Flash Memorywith 4Kbyte Uniform Sector

Eon Silicon Solution Inc. 

EN25S16

Figure 10.1 Read Suspend Status Register Instruction Sequence under EQPI Mode

Table 8. Suspend Status Register Bit Locations

S7

S6

S5

S4

WIP

(Write In

Progress bit)

(Note 1)

1 = write

operation

0 = not in write

operation

volatile bit

Reserved

bit

Fail bit

index

1 = erase or

program or

WRSR

failed

0 = passed

volatile bit

Reserved

bit

S3

WSP

(Write Suspend

Program bits)

1 = Program

suspended

0 = Program is

not suspended

volatile bit

S2

S1

S0

WSE

WEL

(Write Suspend (Write Enable

Erase status bit)

Latch)

1 = Erase

suspended

0 = Erase is not

suspended

1 = write enable

0 = not write

enable

Reserved

bit

volatile bit

volatile bit

Note:

1. When executed the (RDSSR) (09h) command, the WIP (S7) value is the same as WIP (S0) in table 7.

2. Default at Power-up is “0”

The status and control bits of the Suspend Status Register are as follows:

Reserved bit. Suspend Status register bit locations 0, 4 and 6 are reserved for future use. Current

devices will read 0 for these bit locations. It is recommended to mask out the reserved bit when testing

the Suspend Status Register. Doing this will ensure compatibility with future devices.

WEL bit. The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.

When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is

reset and no Write Suspend or Write Resume instruction is accepted.

This Data Sheet may be revised by subsequent versions

20

or modifications due to changes in technical specifications.

©2004 Eon Silicon Solution, Inc.,

Rev. H, Issue Date: 2011/12/16

www.eonssi.com

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