EN25F32 데이터 시트보기 (PDF) - Eon Silicon Solution Inc.

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EN25F32

32 Megabit Serial Flash Memory with 4Kbytes Uniform Sector

Eon Silicon Solution Inc. 

Table 5. Manufacturer and Device Identification

OP Code

ABh

90h

9Fh

(M7-M0)

1Ch

1Ch

(ID15-ID0)

3116h

(ID7-ID0)

15h

15h

EN25F32

Write Enable (WREN) (06h)

The Write Enable (WREN) instruction (Figure 5) sets the Write Enable Latch (WEL) bit. The Write

Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Block Erase

(BE), Chip Erase (CE) and Write Status Register (WRSR) instruction.

The Write Enable (WREN) instruction is entered by driving Chip Select (CS#) Low, sending the

instruction code, and then driving Chip Select (CS#) High.

Figure 5. Write Enable Instruction Sequence Diagram

Write Disable (WRDI) (04h)

The Write Disable instruction (Figure 6) resets the Write Enable Latch (WEL) bit in the Status Register

to a 0 or exit from OTP mode to normal mode. The Write Disable instruction is entered by driving Chip

Select (CS#) low, shifting the instruction code “04h” into the DI pin and then driving Chip Select (CS#)

high. Note that the WEL bit is automatically reset after Power-up and upon completion of the Write

Status Register, Page Program, Sector Erase, Block Erase (BE) and Chip Erase instructions.

This Data Sheet may be revised by subsequent versions

15 ©2004 Eon Silicon Solution, Inc.,

or modifications due to changes in technical specifications.

Rev. G, Issue Date: 2009/10/16

www.eonssi.com

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