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DS273

Cache-Memory Battery-Backup Management IC

Maxim Integrated 

Cache-Memory Battery-Backup Management IC

THERMAL PROTECTION CHARACTERISTICS

(VIN = +10.8V to +13.2V, TA = -20°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.)

PARAMETER

THM Pin Internal Pullup Voltage

THM Pin Internal Resistance

Thermistor Overtemperature

HALT Threshold

SYMBOL

VTHM

RTHM

VHOT

CONDITIONS

(Notes 1, 12)

THM to CBIAS (Note 12)

(Notes 12, 13)

MIN

9.8

0.271

TYP

VCBIAS

10.0

0.283

MAX

10.2

0.292

UNITS

V

k

Ratio to

VCBIAS

Thermistor Overtemperature

Resume Threshold

VHYS-HOT

(Notes 12, 13)

0.3055

Ratio to

VCBIAS

Thermistor Undertemperature

HALT Threshold

VCOLD

(Notes 12, 13)

0.727

0.739

0.748

Ratio to

VCBIAS

Thermistor Undertemperature

Resume Threshold

VHYS-COLD

(Notes 12, 13)

0.714

Ratio to

VCBIAS

Thermistor Disable

Threshold

VDISABLE

(Notes 12, 13)

0.02

0.03

0.04 Ratio to

VCBIAS

Internal Overtemperature

Protection Threshold CCCV

TPROTECT_CCCV (Note 12)

160

°C

Internal Overtemperature

Hysteresis CCCV

THYS-PROTECT_CCCV (Note 12)

-20

°C

Internal Overtemperature

Protection Threshold MEM_REG

TPROTECT_MEMREG (Note 14)

165

°C

Internal Overtemperature

Hysteresis MEM_REG

THYS-PROTECT_

MEMREG

(Note 14)

-15

°C

Charging Current Reduction

Threshold

TCHOKE

(Note 12)

100

°C

Charging Current Reduction Rate

TCHOKE_RATE

(Note 12)

133

mA/°C

Note 1: All voltages referenced to AGND pin.

Note 2: VCIN is equivalent to VAUX when VAUX is greater than VTRIP, otherwise VCIN is equivalent to VBATT+.

Note 3: Supply-current specification is only for current drain of the IC and does not include cell-charge current, load-supply cur-

rent, or any external resistor bias currents. The only exception is ISLEEP, which does account for complete current drain of

the lithium cell during low-battery conditions.

Note 4: Below this voltage, the input is guaranteed to be logic-low.

Note 5: Operating from 3.3V ±10%.

Note 6: Above this voltage, the input is guaranteed to be logic-high.

Note 7: Assumes an RSNS value of 0.05Ω.

Note 8: Relative to VCV.

Note 9: With recommended application circuit.

Note 10: Includes complete package resistance.

Note 11: This specification is from the rising or falling edge of ENS to the closure of the switch and includes whatever delay is in the

internal logic and FET drivers.

Note 12: Applies to charger.

Note 13: Multiply these values by CBIAS voltage to get value in volts. Recommended value of resistor in divider network is 10kΩ ±1%.

Tolerance includes tolerances of internal resistance and CBIAS voltage.

Note 14: Applies to memory buck regulator.

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