DG408LDQ-E3 데이터 시트보기 (PDF) - Vishay Semiconductors
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DG408LDQ-E3 Datasheet PDF : 12 Pages
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DG408L/409L
Vishay Siliconix
SPECIFICATIONS (DUAL SUPPLY V+ = 5 V, V = 5 V)
Parameter
Analog Switch
Symbol
Test Conditions
A Suffix
D Suffix
Unless Otherwise Specified
- 55 to 125 °C - 40 to 85 °C
V+ = 5 V, ± 10 %, V- = - 5 V, V- = 0 V
VEN = 0.6 V or 2.4 Vf
Tempb Typd Minc Maxc Minc Maxc Unit
Analog Signal Rangee
VANALOG
Full
-5
5
-5
5
V
Drain-Source On-Resistance rDS(on)
VD = ± 3.5 V, IS = 10 mA
Sequence Each Switch On
Room 20
Full
40
50
40
50
Ω
Switch Off Leakage Currenta
IS(off)
ID(off)
V+ = 5.5 , V- = 5.5 V
VEN = 0 V, VD = ± 4.5 V, VS = 4.5 V
Room
Full
Room
Full
-1
1
-1
1
- 15 15 - 10 10
-1
1
-1
1
- 15 15 - 10 10 nA
Channel On Leakage
Currenta
Digital Control
ID(on)
V+ = 5.5 V, V- = - 5.5 V
Room
VEN = 2.4 V, VD = ± 4.5 V, VS = 4.5 V Full
-1
1
-1
1
- 15 15 - 10 10
Logic High Input Voltage
Logic Low Input Voltage
Input Currenta
VINH
VINL
IIN
Full
Full
VAX = VEN = 2.4 V or 0.6 V
Full
2.4
2.4
V
0.6
0.6
- 1.5 1.5 - 1
1
µA
Dynamic Characteristics
Transition Timee
tTRANS
VS1 = 3.5 V, VS8 = - 3.5 V, (DG408L)
VS1b = 3.5 V, VS4b = - 3.5 V, (DG409L)
Room
Full
30
60
78
60
65
See Figure 2
Break-Before-Make Timee
tOPEN
VS(all) = VDA = 3.5 V
See Figure 4
Room 8
1
Full
1
ns
Enable Turn-On Timee
tON(EN)
VAX = 0 V, VS1 = 3.5 V (DG408L)
Room 25
Full
55
68
55
60
Enable Turn-Off Timee
tOFF(EN)
VAX = 0 V, VS1b = 3.5 V (DG409L)
See Figure 3
Room 20
Full
40
50
40
45
Source Off Capacitancee
CS(off)
f = 1 MHz, VS = 0 V, VEN = 0 V
Room 6
Drain Off Capacitancee
CD(off)
f = 1 MHz, VD = 0 V, VEN = 0 V
Room 15
pF
Drain On Capacitancee
CD(on)
f = 1 MHz, VD = 0 V, VEN = 2.4 V
Room 29
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. ΔrDS(on) = rDS(on) Max - rDS(on) Min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
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4
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
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