CY7C276(2006) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7C276 Datasheet PDF : 9 Pages
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Switching Waveforms
Read Operation Timing Diagram [5]
A13− A0
tAA
D15 −D0
ADDR A
DATA A
CY7C276
ADDR B
tAA
DATA B
Chip Select and Output Enable Timing Diagrams
A13− A0
CS2−CS0 INACTIVE
ACTIVE
OE
ACTIVE HIGH
D15 −D0
tCSOV
VALID
tOEZ
tOEV
HIGH Z
INACTIVE
tCSOZ
VALID
Note:
5. CS2 – CS0, OE assumed active.
Architecture Configuration Bits
The CY7C276 has four user-programmable options in addition
to the reprogrammable data array. For detailed programming
information contact your local Cypress representative.
The programmable options determine the active polarity for
the three chip selects (CS2–CS0) and OE. When these control
bits are programmed with a 0 the inputs are active LOW. When
these control bits are programmed with a 1 the inputs are
active HIGH.
Programming Information
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
programming information, including a listing of software
packages, please see the PROM Programming Information
located at the end of this section. Programming algorithms can
be obtained from any Cypress representative.
Document #: 38-04004 Rev. *C
Page 4 of 10
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