Switching Waveforms (continued)
Busy Timing Diagram No. 1 (CE Arbitration)[38]
CELValid First:
ADDRESS L,R
ADDRESS MATCH
CEL
CER
BUSYR
CER Valid First:
ADDRESS L,R
tPS
tBLC
tBHC
ADDRESS MATCH
CER
CE L
BUSYL
tPS
tBLC
tBHC
Busy Timing Diagram No. 2 (Address Arbitration)[38]
Left Address Valid First:
ADDRESS L
ADDRESSR
BUSY R
tRC or tWC
ADDRESS MATCH
tPS
tBLA
Right Address Valid First:
ADDRESSR
ADDRESSL
BUSY L
tRC or tWC
ADDRESS MATCH
tPS
tBLA
ADDRESS MISMATCH
tBHA
ADDRESS MISMATCH
tBHA
Note:
38. If tPS is violated, the busy signal will be asserted on one side or the other, but there is no guarantee to which side BUSY will be asserted.
CY7C026A
CY7C036A
13