CY7C144AV(2011) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7C144AV Datasheet PDF : 21 Pages
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Pin Configurations (continued)
64-Pin TQFP Top View
CY7C144AV
CY7C006AV
I/O2L
1
I/O3L
2
I/O4L
3
I/O5L
4
GND
5
I/O6L
6
I/O7L
7
VCC
8
GND
9
I/O0R
10
I/O1R
11
I/O2R
12
VCC
13
I/O3R
14
I/O4R
15
I/O5R
16
48
47
46
45
44
43
42
CY7C006AV (16K x 8)
41
40
39
38
37
36
35
34
33
A4L
A3L
A2L
A1L
A0L
INTL
BUSYL
GND
M/S
BUSYR
INTR
A0R
A1R
A2R
A3R
A4R
Selection Guide
Maximum access time (ns)
Typical operating current (mA)
Typical standby current for ISB1 (mA) (Both ports TTL level)
Typical standby current for ISB3 (A) (Both ports CMOS level)
Pin Definitions
Left Port
CEL
R/WL
OEL
A0L–A12/13L
I/O0L–I/O7L
SEML
INTL
BUSYL
M/S
VCC
GND
NC
Right Port
CER
R/WR
OER
A0R–A12/13R
I/O0R–I/O7R
SEMR
INTR
BUSYR
Description
Chip enable
Read/Write enable
Output enable
Address (A0–A12 for 8K devices; A0–A13 for 16K devices)
Data bus input/output (I/O0–I/O7 for x8 devices)
Semaphore Enable
Interrupt flag
Busy flag
Master or Slave select
Power
Ground
No connect
Document #: 38-06051 Rev. *E
CY7C144AV
CY7C006AV
-25
25
115
30
10 A
Page 4 of 21
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