CY2318ANZ 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY2318ANZ Datasheet PDF : 9 Pages
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Serial Configuration Map
• The Serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Reserved and unused bits should be programmed to “0”.
• Serial interface address for the CY2318ANZ is:
•
•
A6 A5 A4 A3 A2 A1
1
1
0
1
0
0
•
•
Byte 0:SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit Pin #
Description
Bit 7 18 SDRAM7 (Active/Inactive)
Bit 6 17 SDRAM6 (Active/Inactive)
Bit 5 14 SDRAM5 (Active/Inactive)
Bit 4 13 SDRAM4 (Active/Inactive)
Bit 3 9
SDRAM3 (Active/Inactive)
Bit 2 8
SDRAM2 (Active/Inactive)
Bit 1 5
SDRAM1 (Active/Inactive)
Bit 0 4
SDRAM0 (Active/Inactive)
A0 R/W
1 ----
CY2318ANZ
Byte 1: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
45
44
41
40
36
35
32
31
Description
SDRAM15 (Active/Inactive)
SDRAM14 (Active/Inactive)
SDRAM13 (Active/Inactive)
SDRAM12 (Active/Inactive)
SDRAM11 (Active/Inactive)
SDRAM10 (Active/Inactive)
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
Byte 2: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit Pin #
Description
Bit 7 28
Bit 6 21
Bit 5 --
SDRAM17 (Active/Inactive)
SDRAM16 (Active/Inactive)
Reserved, drive to 0
Bit 4 --
Bit 3 --
Bit 2 --
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Bit 1 --
Bit 0 --
Reserved, drive to 0
Reserved, drive to 0
Document #: 38-07181 Rev. *B
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