CS5155GN16 데이터 시트보기 (PDF) - ON Semiconductor

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CS5155GN16

CPU 5−Bit Synchronous Buck Controller

ON Semiconductor 

CS5155

condition ceases or the input voltage is pulled low. The

5.0 V

bottom FET and board trace must be properly designed to

implement the OVP function.

Shutdown

Input

MMUN2111T1 (SOT−23)

IN4148

5 SS

CS5155

8 VFFB

M 10.0 μs

Trace 4− 5.0 V from PC Power Supply (5.0 V/div.)

Trace 1− Regulator Output Voltage (1.0 V/div.)

Trace 2− Inductor Switching Node 5.0 V/div.)

Figure 14. OVP Response to an Input−to−Output

Short Circuit by Immediately Providing 0% Duty

Cycle, Crow−Barring the Input Voltage to Ground

M 5.00 ms

Trace 4− 5.0 V from PC Power Supply (2.0 V/div.)

Trace 1− Regulator Output Voltage (1.0 V/div.)

Figure 15. OVP Response to an Input−to−Output Short

Circuit by Pulling the Input Voltage to Ground

External Output Enable Circuit

On/off control of the regulator can be implemented

through the addition of two additional discrete components

(see Figure 16). This circuit operates by pulling the Soft

Start pin high, and the VFFB pin low, emulating a short

circuit condition.

Figure 16. Implementing Shutdown with the CS5155

External Power Good Circuit

An optional Power Good signal can be generated through

the use of four additional external components (see Figure

17). The threshold voltage of the Power Good signal can be

adjusted per the following equation:

VPower

Good

+

(R1

)

R2)

R2

0.65 V

This circuit provides an open collector output that drives

the Power Good output to ground for regulator voltages less

than VPower Good.

5.0 V

R1

10 k

VOUT

CS5155

R3

10 k

PN3904

R2

6.2 k

Power Good

PN3904

Figure 17. Implementing Power Good with the CS5155

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