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CM2006

Praetorian® L-C LCD and Camera EMI Filter Array with ESD Protection

ON Semiconductor 

Praetorian® L-C LCD and Camera

EMI Filter Array with ESD Protection

CM2006

Features

• Includes ESD protection, level-shifting, buffering

and sync impedance matching

• VESA VSIS Version 1 Revision 2 compatible

interface

• Supports optional NAVI signalling requirements

• 7 channels of ESD protection for all VGA port

connector pins. All pins meet IEC-61000-4-2 Level

4 ESD requirements (±8kV contact discharge)

• Very low loading capacitance from ESD protection

diodes on VIDEO lines (3pF maximum)

• Schmitt-triggered input buffers for HSYNC and

VSYNC lines

• Bidirectional level shifting N-channel FETs provided

for DDC_CLK and DDC_DATA channels

• Backdrive protection on all lines

• Compact 16-lead QSOP package

• RoHS-compliant, lead-free finishing

Applications

VGA and DVI-I ports in:

• Monitors

• TVs

Product Description

The CM2006 connects between the VGA or DVI-I port

connector and the internal analog or digital flat panel

controller logic. The CM2006 incorporates ESD

protection for all signals, level shifting for the DDC

signals and buffering for the SYNC signals. ESD

protection for the video, DDC and SYNC lines is

implemented with low-capacitance current steering

diodes.

All connector interface pins are designed to safely

handle the high current spikes specified by IEC-61000-

4-2 Level 4 (±8kV contact discharge). The ESD

protection for the DDC, SYNC and VIDEO signal pins is

designed to prevent "backdrive current" when the device

is powered down while connected to a video source that

is powered up.

Separate positive supply rails are provided for the

VIDEO / SYNC signals and DDC signals to facilitate

interfacing with low voltage video controller ICs and

microcontrollers to provide design flexibility in multi-

supply-voltage environments.

Two Schmitt-triggered non-inverting buffers redrive and

condition the HSYNC and VSYNC signals from the

video connector (SYNC1, SYNC2). These buffers

accept VESA VSIS compliant TTL input signals and

convert them to CMOS output levels that swing between

ground and VCC.

Two N-channel MOSFETs provide the level shifting

function required when the DDC controller or EDID

EEPROM is operated at a lower supply voltage than the

monitor. The gate terminals for these MOSFETS

(VCC_DDC) should be connected to the supply rail (typically

3.3V, 2.5V etc.) that supplies power to the transceivers

of the DDC controller.

The CM1693 is housed in space saving, low profile,

0.40mm pitch uDFN packages in a RoHS compliant,

lead-free format.

©2010 SCILLC. All rights reserved.

May 2010 – Rev. 2

Publication Order Number:

CM2006/D

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