CDP1872CE 데이터 시트보기 (PDF) - Intersil

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CDP1872CE

High-Speed 8-Bit Input and Output Ports

Intersil 

CDP1872C, CDP1874C, CDP1875C

CSI • CS2

(CDP1872C)

CSI • CS2

(CDP1874C)

CLOCK

tDSU

tDH

tCL

DATA IN

tEN

DATA BUS

(HIGH Z)

CLR

tCLO

tDIS

tDIO

tCRO

tCR

FIGURE 4. TIMING WAVEFORMS FOR CDP1872C AND CDP1874C (INPUT-PORT TYPES)

Dynamic Electrical Specifications At TA = 25oC, VDD 5V, tR, tF = 10ns, VIH = 0.7VDD, VIL = 0.3VDD, CL = 150pF

LIMITS

CDP1875C

PARAMETER

(NOTE 1) (NOTE 2)

MIN

TYP

MAX

OUTPUT PORT (FIGURE 5)

Clock to Data Out

Clear to Output

Data In to Data Out

Minimum Data Setup Time

Data Hold Time

Minimum Clear Pulse Width

NOTES:

1. Typical values are for TA = +25oC and VDD ±5%.

2. Maximum values are for TA = +85oC and VDD ±5%

tCLO

-

tCRO

-

tDIO

-

tDS

-

tDH

-

tCR

-

50

100

80

160

50

85

10

30

10

30

30

60

UNITS

ns

ns

ns

ns

ns

ns

CSI • CS2 • CS3 = CLOCK

tDS

tDH

DATA IN

DATA OUT

CLR

tDIO

tCLO

tCRO

tCR

FIGURE 5. TIMING WAVEFORMS FOR CDP1875C (OUTPUT PORT)

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