CDP1874C 데이터 시트보기 (PDF) - Intersil
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CDP1874C Datasheet PDF : 6 Pages
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CDP1872C, CDP1874C, CDP1875C
Logic Diagrams
CS1
CS2
DI
CLOCK
D
CQ
DO
R
CLR
FIGURE 1. EQUIVALENT LOGIC DIAGRAM (1 OF 8 LATCHES
SHOWN) FOR CDP1872C
CS1
CS2
DI
CLOCK
D
CQ
DO
R
CLR
FIGURE 2. EQUIVALENT LOGIC DIAGRAM (1 OF 8 LATCHES
SHOWN) for CDP1874C
CS1
DI D
CS2
C
CS3
Q
DO
R
CLR
FIGURE 3. EQUIVALENT LOGIC DIAGRAM (1 OF 8 LATCHES SHOWN) FOR CDP1875C
Dynamic Electrical Specifications At TA = 25oC, VDD 5V, tR, tF = 10ns, VIH = 0.7VDD, VIL = 0.3VDD, CL = 150pF
LIMITS
CDP1872C, CDP1874C
PARAMETER
(NOTE 1) (NOTE 2)
MIN
TYP
MAX
INPUT PORT (FIGURE 4)
Output Enable
Output Disable
Clock to Data Out
Clear to Output
Data In to Data Out
Minimum Data Setup Time
Data Hold Time
Minimum Clock Pulse Width
Minimum Clear Pulse Width
NOTES:
1. Typical values are for TA = +25oC and VDD ±5%.
2. Maximum values are for TA = +85oC and VDD ±5%
tEN
-
tDIS
-
tCLO
-
tCRO
-
tDIO
-
tDSU
-
tDH
-
tCL
-
tCR
-
45
90
45
90
45
90
80
160
50
85
10
30
10
30
30
60
30
60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
4-78
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