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PI74ALVCH16825A 데이터 시트보기 (PDF) - Pericom Semiconductor

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PI74ALVCH16825A
Pericom-Semiconductor
Pericom Semiconductor Pericom-Semiconductor
PI74ALVCH16825A Datasheet PDF : 4 Pages
1 2 3 4
PI74ALVCH16825
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3.3V 18-Bit Buffer/Driver
with 3-State Outputs
Product Features
PI74ALVCH16825 is designed for low voltage operation
VCC = 2.3V to 3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS technology,
achieving industry leading speed.
This 18-bit buffer and line driver is designed for 2.3V to 3.6V VCC
operation.
PI74ALVCH16825 improves the performance and density of 3-
state memory address drivers, clock drivers, and bus-oriented
receivers and transmitters.
Providing true data, the device can be used as two 9-bit buffers or
one 18-bit buffer.
The 3-state control gate is a 2-input AND gate with Active-Low
inputs so that if either Output Enable (OE1 or OE2) input is HIGH,
all nine affected outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vcc through a pull-up resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
inputs at a valid logic level.
Logic Block Diagram
1OE1
1
56
1OE2
1A1
55
2OE1
28
29
2OE2
2 1Y1 2A1
41
16 2Y1
To Eight Other Channels
To Eight Other Channels
1
PS8158
11/17/97

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