ATF1508ASZ-20QC100(1998) 데이터 시트보기 (PDF) - Atmel Corporation

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ATF1508ASZ-20QC100
(Rev.:1998)

High Performance E2 PLD

Atmel Corporation 

Figure 1. ATF1508AS Macrocell

Programmable Pin-Keeper Option

for Inputs and I/Os

The ATF1508AS offers the option of programming all input

and I/O pins so that “pin keeper” circuits can be utilized.

When any pin is driven high or low and then subsequently

left floating, it will stay at that previous high or low level.

This circuitry prevents unused input and I/O lines from

floating to intermediate voltage levels, which cause unnec-

essary power consumption and system noise. The keeper

circuits eliminate the need for external pull-up resistors and

eliminate their DC power consumption.

Speed/Power Management

The ATF1508AS has several built-in speed and power

management features. The ATF1508AS contains circuitry

that automatically puts the device into a low power stand-

by mode when no logic transitions are occurring. This not

only reduces power consumption during inactive periods,

but also provides a proportional power savings for most

applications running at system speeds below 5 - 10 MHz.

To further reduce power, each ATF1508AS macrocell has

a Reduced Power bit feature. This feature allows individual

macrocells to be configured for maximum power savings.

This feature may be selected as a design option.

Input Diagram

I/O Diagram

6

ATF1508AS/Z

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