TDA8793HL 데이터 시트보기 (PDF) - Philips Electronics
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TDA8793HL Datasheet PDF : 20 Pages
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Philips Semiconductors
8-bit, low-power, 3 V, 100 Msps
Analog-to-Digital Converter (ADC)
Preliminary specification
TDA8793
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Track enable input (pin TEN); see Table 2
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
IIL
LOW-level input current
IIH
HIGH-level input current
VTEN = 0
VTEN = VCCD
0
−
0.8
2
−
VCCD
−5
−
−
−
−
5
Inputs (pins INP and INN); analog input voltage referenced to AGND; VREFIN = 1.27 V; see Table 3
Vi(p-p)
∆TCI
Vi(os)
Zi
Ci
IIL
IIH
input voltage range
(peak-to-peak value)
input voltage range drift
input offset voltage
input impedance
input capacitance
LOW-level input current
HIGH-level input current
Vi = VINP − VINN;
Tamb = 25 °C
output code = 127
fINP = 50 MHz
fINP = 50 MHz
VINP = VREFOUT + 0.5
VINP = VREFOUT − 0.5
VINP = VREFOUT + 0.5
VINP = VREFOUT − 0.5
0.90
−
−25
−
−
−1
−1
−
−
0.97 1.040
0.5
−
−
+25
90
−
2
−
−
−
−
−
−
40
−
40
Adjustable full scale range; VREFIN = 1.2 to 1.35 V; see Fig.3
VI(p-p)
input voltage range
(peak-to-peak value)
Vi = VINP − VINN;
−
1
−
Tamb = 25 °C
Voltage controlled regulator input pin VREFIN (referenced to AGND); note 3
Vi(ref)
Ii(ref)
reference voltage
input current on pin VREFIN
tbf
1.25 tbf
−
tbf
1.1
Outputs; ADC data outputs
VOL
VOH
CL
δv/δt
LOW-level output voltage
HIGH-level output voltage
output load capacitance
slew rate
IO = 1 mA
IO = −0.4 mA
10% to 90%; CL = 10 pF
−
−
VCCO − 0.5 −
−
−
−
1.2
0.5
VCCO
10
−
Switching characteristics; note 2; see Table 1
fCLK(min)
fCLK(max)
tW(CLKH)
tW(CLKL)
minimum clock frequency
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
track = LOW
−
−
6
100
−
−
4
−
−
4
−
−
V
V
µA
µA
V
mV/K
mV
kΩ
pF
µA
µA
µA
µA
V
V
mA
V
V
pF
V/ns
MHz
MHz
ns
ns
1999 Oct 06
7
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