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AT24C164-10PU-1.8 데이터 시트보기 (PDF) - Atmel Corporation

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AT24C164-10PU-1.8
Atmel
Atmel Corporation Atmel
AT24C164-10PU-1.8 Datasheet PDF : 17 Pages
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AT24C164
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open
collector devices.
DEVICE SELECT (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that
may be hardwired or actively driven to VDD or VSS. These inputs allow the selection for
one of eight possible devices sharing a common bus. The AT24C164 can be made
compatible with the AT24C16 by tying A2, A1 and A0 to VSS. Device addressing is dis-
cussed in detail in the device addressing section.
WRITE PROTECT (WP): The write protect input, when tied low to GND, allows normal
write operations. When WP is tied to VCC, all write operations are inhibited.
Memory Organization The AT24C164 is internally organized with 256 pages of 8 bytes each. Random word
addressing requires an 11 bit data word address.
3
0105J–SEEPR–12/06

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