AS6C62256 데이터 시트보기 (PDF) - Alliance Semiconductor
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AS6C62256 Datasheet PDF : 12 Pages
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February 2007
AS6C62256
®
32K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
A14
1
A12
2
A7
3
A6
4
A5
5
A4
6
A3
7
A2
8
A1
9
A0
10
DQ0
11
DQ1
12
DQ2
13
Vss
14
28
Vcc
27
WE#
26
A13
25
A8 OE#
1
A11
2
24
A9
A9
3
A8
4
23
A11 A13
5
22
OE#
WE#
Vcc
6
7
21
A10 A14
8
A12
9
20
CE# A7
10
A6
11
19
DQ7 A5
12
A4
13
18
DQ6 A3
14
17
DQ5
16
DQ4
15
DQ3
PDIP/SOP
AS6C62256
sTSOP
28
A10
27
CE#
26
DQ7
25
DQ6
24
DQ5
23
DQ4
22
DQ3
21
Vss
20
DQ2
19
DQ1
18
DQ0
17
A0
16
A1
15
A2
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
SYMBOL
RATING
UNIT
Terminal Voltage with Respect to VSS
VTERM
-0.5 to 7.0
V
Operating Temperature
0 to 70(C grade)
ºC
TA
-40 to 85(I grade)
ºC
Storage Temperature
TSTG
-65 to 150
Power Dissipation
PD
1
W
DC Output Current
IOUT
50
mA
Soldering Temperature (under 10 sec)
TSOLDER
260
ºC
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
CE#
Standby
H
Output Disable
L
Read
L
Write
L
Note: H = VIH, L = VIL, X = Don't care.
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
DOUT
DIN
SUPPLY CURRENT
ISB,ISB1
ICC,ICC1
ICC,ICC1
ICC,ICC1
02/FEB/07, v1.0
Alliance Memory Inc.
Page 2 of 12
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