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APW7077

PWM Step-Up DC-DC Converter

Anpec Electronics 

APW7077/A

Function Description (Cont.)

Inductor Selection (Cont.)

when ∆IL is less than the average inductor current.

Care must be taken to make sure that the switch will

not reach its current limit during normal operation.

The inductor must also be sized accordingly. It should

have a saturation current rating higher than the peak

inductor current expected. The output voltage ripple is

also affected by the total ripple current.

Output Capacitor

The output capacitor is used for sustaining the output

voltage when the external MOSFET or bipolar

transistor is switched on and smoothing the ripple

voltage.

The output capacitance needed is calculated in

equations.

IO(max) × D

COUT(min) =

fsw × ∆VOUT

The ESR is also important because it determines the

peak to peak output voltage ripple according to the

approximate equation:

ESR = ? VOUT

? IO

With 1% output voltage ripple, low ESR capacitor

should be used to reduce output ripple voltage. In

general, a 100uF to 220uF low ESR (0.10Ω to 0.30Ω)

Tantalum capacitor should be appropriate. The choice

of output capacitors is also somewhat arbitrary and

depends on the design requirements for output voltage

ripple. A minimum value of 10µF is recommended and

may be increased to a larger value.

Input Capacitor

The input capacitor can stabilize the input voltage and

minimize peak current ripple from the source. The size

used is dependant on the application and board layout.

If the regulator will be loaded uniformly, with very little

load changes, and at lower current outputs, the input

capacitor size can often be reduced. The size can also

be reduced if the input of the regulator is very close to

the source output. The size will generally need to be

larger for applications where the regulator is supplying

nearly the maximum rated output or if large load steps

are expected. A minimum value of 10µF should be

used for the less stressful conditions while a 22µF to

47µF capacitor may be required for higher power and

dynamic loads. Small ESR Tantalum or ceramic ca-

pacitor should be suitable and the total input ripple

voltage can be calculated

∆VIN = ∆IL × ESR

Design Example

It is supposed that a step–up DC–DC controller with

3.3 V output delivering a maximum 1000 mA output

current with 100 mV output ripple voltage powering

from a 2.4 V input is to be designed.

Design parameters:

VIN = 2.4 V

V = 3.3 V

OUT

IO = 1.0 A

∆VOUT = 100 mV

fsw= 300 kHZ

Ratio = 0.2 (typical for small output ripple voltage)

Assume the diode forward voltage and the transistor

saturation voltage are both 0.3V. Determine the maxi-

mum steady state duty cycle at VIN = 2.4 V:

D=0.273

Calculate the maximum inductance value which can

generate the desired current output and the preferred

delta inductor current to average inductor current ratio:

L=10uH

Copyright © ANPEC Electronics Corp.

14

Rev. A.4 - Sep, 2005

www.anpec.com.tw

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