MSM7534RS 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM7534RS

2ch Single Rail CODEC

Oki Electric Industry 

¡ Semiconductor

MSM7533H/7533V/7534

RSYNC

Receive synchronizing signal input.

The eight bits PCM data required are selected from serial PCM signals on the DIN1 and DIN2

pins by the receive synchronizing signal.

Signals in the receive section are synchronized by this synchronizing signal. This signal must be

synchronized in phase with the BCLK (generated from the same clock source as BCLK). The

frequency should be 8 kHz ±50 ppm to guarantee the AC characteristics which are mainly the

frequency characteristic of the receive section.

However, if the frequency characteristic of the system used is not strictly specified, this device

can operate in the range of 6 kHz to 9 kHz, but the electrical characteristics in this specifications

are not guaranteed.

XSYNC

Transmit synchronizing signal input.

The PCM output signal from the DOUT1 and DOUT2 pins is output in synchronization with this

transmit synchronizing signal. This synchronizing signal triggers the PLL and synchronizes all

timing signals of the transmit section.

This synchronizing signal must be synchronized in phase with BCLK.

The frequency should be 8 kHz ±50 ppm to guarantee the AC characteristics which are mainly

the frequency characteristic of the transmit section.

However, if the frequency characteristic of the system used is not strictly specified, this device

can operate in the range of 6 kHz to 9 kHz, but the electrical characteristics in this specification

are not guaranteed.

Setting this signal to logic "1" or "0" drives both transmit and receive circuits to power saving

state.

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