datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AN5095K 데이터 시트보기 (PDF) - Panasonic Corporation

부품명
상세내역
일치하는 목록
AN5095K Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AN5095K
ICs for TV
s Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min Typ Max Unit
RGB processing circuit (continued) DAC data are typicals
External R, G, B frequency
characteristic
fRGBC Input 0.2 V[p-p]
8 10 MHz
Internal and external R, G, B
output voltage ratio
VE/I External part 0.7 V[p-p]/internal part 0.78 0.92 1.06 Time
0.6 V[p-p] input, contrast 03 = 20 (typ.)
Synchronizing signal processing circuit
Horizontal free run frequency
fHO Without sync. signal input
15.33 15.63 15.93 kHz
Horizontal output pulse duty cycle τHO Upward pulse duty cycle
31 37 43 %
Horizontal pull-in range
fHP Difference from fH = 15.625 kHz
± 500 ± 650 Hz
PAL horizontal free run frequency fVO-P Data 01-D7 = 1, 02-D7 = 0, forced
48 50 52
Hz
50 Hz mode, without sync. signal input
NTSC vertical free run frequency fVO-N Data 01-D7 = 1, 02-D7 = 1, forced
58 60 62 Hz
60 Hz mode, without sync. signal input
Vertical output pulse width
τVO For both PAL/NTSC
9 10 11 1/fH
PAL vertical pull-in range
fVPP fH = 15.625 kHz, forced 50 Hz mode
46 54 Hz
NTSC vertical pull-in range
fVPN fH = 15.75 kHz, forced 60 Hz mode
56 64 Hz
Horizontal high-level output voltage V56H High-level DC voltage
2.8 3.1 3.4 V
Horizontal low-level output voltage V56L Low-level DC voltage
  0.3 V
Vertical high-level output voltage V58H High-level DC voltage
3.9 4.2 4.5 V
Vertical low-level output voltage V58L Low-level DC voltage
  0.3 V
Screen center variable range
THC Change amount of phase difference between 2.6 3.2 4.4 µs
sync. and H-out of data 0B = 40 to 47
Overvoltage protection operation VX-RAY The pin 55 minimum voltage at which 0.60 0.68 0.76 V
voltage
H-out does not appear any longer
Vertical frequency
discrimination (50)
f50 Vertical frequency at which V5 becomes 47 55 Hz
low (< 0.5 V)
Vertical frequency
discrimination (60)
f60 Vertical frequency at which V5 becomes 57 63 Hz
high (> 4.5 V)
Synchronous signal clamp voltage V46 V46 clamp voltage
Horizontal output start voltage
VfHS The minimum V50 at f0 > 10 kHz
and horizontal oscillation output is
higher than 1 V[p-p]
1.1 1.4 1.7 V
3.4 4.2 5.0 V
I2C interface
Sink current when ACK
IACK The maximum value of pin 21 sink
current at ACK
1.5 2.0 5.0 mA
SCL, SDA signal high level input VIHI
SCL, SDA signal low level input VILO
Allowable maximum input
fImax
frequency
3.1  
V
  0.9 V
  100 kbit/s
10

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]