AM7968-125DC 데이터 시트보기 (PDF) - Advanced Micro Devices

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AM7968-125DC

TAXIchip Integrated Circuits (Transparent Asynchronous Xmitter-Receiver Interface)

Advanced Micro Devices 

AMD

BLOCK DIAGRAM (continued)

Am7969

Serial In+ (SERIN+)

Serial In– (SERIN–)

Media

Interface

Shifter

Decoder Latch

Data Decoder

(X1)

Oscillator

and

Clock Gen.

(X2)

PLL Clock

Generator

Byte Sync

Logic

(DMS) Data Mode Select

(CNB) Catch Next Byte

(IGM) I-Got-Mine

Output Latch

(VLTN)

Violation

Note:

N can be 8, 9, or 10 bits Total of N + M = 12

N

M

Data Command

CONNECTION DIAGRAMS

Top View

Am7968

(CLK) Clock

(DSTRB) Data Strobe

(CSTRB) Command Strobe

07370F-2

DIPs

LCC/PLCC

ACK 1

STRB 2

SEROUT+ 3

SEROUT– 4

VCC2 (ECL) 5

VCC1 (TTL) 6

VCC3 (CML) 7

RESET 8

DMS 9

TLS 10

TSERIN 11

CI0 12

CI1 13

DI9/CI2 14

28 DI5

27 DI4

26 DI3

25 DI2

24 DI1

23 DI0

22 GND1 (TTL)

21 GND2 (CML)

20 X1

19 X2

18 CLK

17 DI6

16 DI7

15 DI8/CI3

07370F-3

VCC2 (ECL)

VCC1 (TTL)

VCC3 (TTL)

RESET

DMS

TLS

TSERIN

4 3 2 1 28 27 26

5

25

6

24

7

23

8

22

9

21

10

20

11

19

12 13 14 15 16 17 18

DI2

DI1

DI0

GND1 (TTL)

GND2 (CML)

X1

X2

07370F-4

Note:

Pin 1 is marked for orientation.

2

Am7968/Am7969

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